instruction level multiprogram英 ![]() ![]() |
instruction level program英 [ɪnˈstrʌkʃn ˈlevl ˈprəʊɡræm] ![]() ![]() |
instruction level simulation英 [ɪnˈstrʌkʃn ˈlevl ˌsɪmjuˈleɪʃn] ![]() ![]() |
instruction list英 [ɪnˈstrʌkʃn lɪst] ![]() ![]() |
instruction machine code英 [ɪnˈstrʌkʃn məˈʃiːn kəʊd] ![]() ![]() |
instruction marker control英 [ɪnˈstrʌkʃn ˈmɑːkə(r) kənˈtrəʊl] ![]() ![]() |
instruction memory英 [ɪnˈstrʌkʃn ˈmeməri] ![]() ![]() |
instruction mode英 [ɪnˈstrʌkʃn məʊd] ![]() ![]() |
instruction modification英 [ɪnˈstrʌkʃn ˌmɒdɪfɪˈkeɪʃn] ![]() ![]() |
instruction modifier英 [ɪnˈstrʌkʃn ˈmɒdɪfaɪə(r)] ![]() ![]() |
instruction number英 [ɪnˈstrʌkʃn ˈnʌmbə(r)] ![]() ![]() |
instruction operation code英 [ɪnˈstrʌkʃn ˌɒpəˈreɪʃn kəʊd] ![]() ![]() |
instruction packet英 [ɪnˈstrʌkʃn ˈpækɪt] ![]() ![]() |
instruction path英 [ɪnˈstrʌkʃn pɑːθ] ![]() ![]() |
instruction phase英 [ɪnˈstrʌkʃn feɪz] ![]() ![]() |
instruction pipeline英 [ɪnˈstrʌkʃn ˈpaɪplaɪn] ![]() ![]() |
instruction pointer英 [ɪnˈstrʌkʃn ˈpɔɪntə(r)] ![]() ![]() |
instruction prefetch英 ![]() ![]() |
instruction processing function英 [ɪnˈstrʌkʃn ˈprəʊsesɪŋ ˈfʌŋkʃn] ![]() ![]() |
instruction processor英 [ɪnˈstrʌkʃn ˈprəʊsesə(r)] ![]() ![]() |
instruction queue英 [ɪnˈstrʌkʃn kjuː] ![]() ![]() |
instruction register英 [ɪnˈstrʌkʃn ˈredʒɪstə(r)] ![]() ![]() |
instruction repertoire英 [ɪnˈstrʌkʃn ˈrepətwɑː(r)] ![]() ![]() |
instruction reportory英 ![]() ![]() |
instruction retry英 [ɪnˈstrʌkʃn ˌriːˈtraɪ] ![]() ![]() |
instruction retry facility英 [ɪnˈstrʌkʃn ˌriːˈtraɪ fəˈsɪləti] ![]() ![]() |
instruction segment英 [ɪnˈstrʌkʃn ˈseɡmənt] ![]() ![]() |
instruction sequence英 [ɪnˈstrʌkʃn ˈsiːkwəns] ![]() ![]() |
instruction set expandability英 ![]() ![]() |
instruction simulation英 [ɪnˈstrʌkʃn ˌsɪmjuˈleɪʃn] ![]() ![]() |