HDLC
英
美
abbr. 高级数据链路控制; 高级数据链路控制器; 高级数据链路控制规程
双语例句
- In reliable protocols such as TCP and HDLC, a timer is required to timing for data package overtime retransmission.
在TCP、HDLC等能提供可靠通信服务的通信协议中，需要使用定时器来对数据包的超时重发进行计时。 - LAPD is a data link layer protocol based on HDLC.
LAPD建基于HDLC之上，也属于资料链结层协定之一种。 - Design of HDLC protocol communication circuit based on DSP and FPGA
基于DSP和FPGA的HDLC协议通讯电路设计 - Implementation of Multi-channel HDLC Protocol Based on FPGA
多通道HDLC协议的FPGA实现 - FPGA-based Multi-channel HDLC Transceiver Circuit Design
基于FPGA的多通道HDLC收发电路设计 - Conclusion Lycopene can prevent the lipid disturbance of rats fed on a high fat diet, promote HDLC synthesis, and decrease the deposition of TC, TG, and LDLC.
结论番茄红素具有预防高脂饲料喂饲大鼠血清和肝组织脂代谢紊乱的作用，其机制可能是促进HDLC合成，减少TC、TG、LDLC在体内的蓄积。 - In this study we investigated the effects of intracerebro-ventricular injection of glucagon on serum high density lipoprotein-cholesterol ( HDLc) in rabbits.
本工作又观察了它对空腹血清高密度脂蛋白-胆固醇浓度的影响。 - Patients with diabetes have some special lipid abnormalities with triglycerides and low HDLC as their main characteristics.
糖尿病患者血脂会出现以甘油三酯和HDL降低为主要特征的异常情况。 - International Circulation: Some studies related to increasing HDLC against atherosclerosis and reducing cardiovascular and cerebral vascular events have not really gotten promising results.
《国际循环》：有些与升高HDL，降低心脑血管病事件相关的试验并没有得到有希望的结果。 - HDLC specifies a data encapsulation method on synchronous serial links using frame characters and checksums.
使帧特性帧校验序连接指种数据封装。 - The Study of Hybrid ARQ System in HDLC Protocol
HDLC规程中混合ARQ体制研究 - MCC Driver Design Based on HDLC in Synthesis Multiplexing Technology
综合复用技术中基于HDLC的MCC驱动设计 - The Design of HDLC Controller Based on FPGA
基于FPGA的HDLC协议控制器的设计 - This paper will provide HDLC user interface, simulation algorithm, main data structures and a simple example.
本文将介绍HDLC的用户界面、仿真算法、主要数据结构，并给出简单例子。 - This software includes two independent function blocks: the HDLC protocol and a user-defined protocol.
该软件部分涉及HDLC链路协议和一个自定义的高层协议，两者是完全独立的模块。 - In this paper, a HDLC protocol controller is designed for actual request of some radar in Field Programmable Gate Array ( FPGA), the design conceive and the design of some functional module are described detailedly.
根据某雷达的实际要求在FPGA中设计了HDLC协议处理器，并详述了该协议器的设计构想及具体功能模块的实现。 - This article introduces a new sort of Ethernet over SDH mapping format and the corresponding application instance. Also the comparision with HDLC mapping is made.
介绍一种新的EthernetoverSDH的映射方式，以及相应的使用实例，并和HDLC映射方式作了比较。 - HDLC Design Realization Based on FPGA
基于FPGA的HDLC设计实现 - In the hardware design part, we depicted mainly the process how to realize the system's interface with the PCI bus, HDLC chip, and a dual-port RAM.
在硬件设计部分，我们主要描述了系统同PCI总线，同HDLC芯片，双口缓冲RAM的接口的实现过程； - The second part uses FPGA ( Field Programmable Gate Array) to realize the HDLC protocol.
第二部分是利用FPGA（FieldProgrammableGateArray，现场可编程门阵列）来实现HDLC协议。 - Implementation and design of communication controller and software of HDLC protocol are presented in this paper.
本文介绍HDLC通信控制器及HDLC规程软件的实现原理、方法和设计过程。 - By registering the HDLC device to the uClinux kernel as an Ethernet device and carrying out protocol conversion between Ethernet and HDLC in the device driver, high efficient data forwarding between Ethernet and HDLC interface is achieved.
采取将HDLC接口向内核注册为Ethernet设备，并在驱动中完成Ethernet与HDLC协议间转换的设计方案，实现了数据在Ethernet和HDLC接口间的高效转发。 - HDLC is used broadly as a protocol of Data Link Layer. The subset of HDLC is adopted by X.
HDLC是被广泛用作数据链路层的控制协议，HDLC的子集被X。 - Realization of Data Link Protocol Based on HDLC by Using VB
在VB中实现基于HDLC的数据链路层协议 - Application of HDLC Protocol in Communication System and Realization in FPGA
HDLC协议在通信系统中的应用及其在FPGA中的实现 - Based on the analysis of communication process in T.30 and data frame of HDLC, the software part achieves the software implementation of the facsimile signal collection by phases.
软件部分以分析T.30规程建议的通信过程和HDLC数据帧格式为基础，分阶段完成了对传真信号采集的软件实现。 - On this basis, HDLC hardware interface, storage system and its interface are been designed for Embedded HDLC communications system board hardware system.
在此基础上，针对嵌入式HDLC通信系统板硬件系统，主要设计了HDLC硬件接口和存储系统及其接口。 - Secondly, it gives a description of basic working principles of the SDH technology, HDLC protocol and GE, and provides a comparative analysis on the performances of the existing network testers.
其次阐述了SDH技术、HDLC协议和GE的基本工作原理，并对比分析了现有网络测试仪的功能。 - The audio encoding and decoding algorithms are running in DSP. Based on embedded Linux operating system, the application process running in ARM, realizes the control of the HDLC device and gets the train control information through the HDLC communication with the Train Monitor System.
音频编解码算法运行在DSP中，应用程序运行在ARM中，基于嵌入式Linux操作系统，实现对HDLC通讯设备的驱动控制，与列车监控系统TMS进行HDLC数据通讯，获取列车控制信息。