Nmos
英
美
网络 金属氧化物半导体; 沟道金属氧化物半导体; 场效应管; N型金氧半导体; 增强型N沟道场效应管
双语例句
- Study on Channel Strain in Strained-Si NMOS Transistor by Simulation
应变硅NMOS晶体管沟道应变的模拟研究 - Driving and Sampling Technology of High Performance Photoelectrical NMOS Array Detector in the Application of Spectral Measurement
一种应用于光谱测量的高性能光电NMOS阵列探测器的驱动与采集 - This Structure is not That Structure& An Analysis of the Differences between Structuralism and Structural Realism; This is due to the fact that each transistor in a CMOS circuit is actually made from a PMOS transistor and an NMOS transistor.
此结构非彼结构&结构主义与结构现实主义辨析这是由于cmos里的每一个晶体管都是由一个PMOS和一个NMOS晶体管组成的。 - Integrated circuit. NMOS, asynchronous communications interface adapter.
集成电路。NMOS管，异步通信接口适配器。 - The A1210-A1214 Hall-effect latches include the following on a single silicon chip: voltage regulator, Hall-voltage generator, small-signal amplifier, Schmitt trigger, and NMOS output transistor.
在A1210-A1214霍尔效应锁存包括一个单一的硅芯片上以下内容：稳压器，霍尔电压发生器，小信号放大器，施密特触发器和NMOS输出晶体管。 - Total-dose irradiation effect of partially-depleted NMOS transistors with gate-all-around and H-gate structures fabricated on modified SIMOX was studied.
研究了在改性注氧隔离（SIMOX）材料上制备的具有环栅和H型栅结构的部分耗尽NMOS晶体管在三种不同偏置状态的总剂量辐照效应。 - E/ D NMOS reference is adopted and a PMOS transistor is used as pass element in the design.
电路设计中，采用E/DNMOS基准，用PMOS管作调整管； - Through inductor optimization, the VCO has a low phase noise and a wide tuning range with switched capacitor array and NMOS varactor.
通过优化集成电感的设计，同时采用NMOS管和开关电容阵列作为可变电容，使该设计具有较低的相位噪声和较宽的调谐范围。 - TDDB evaluation experiments were implemented on the 90 nm NMOS devices under constant voltage stress. The breakdown mechanism of TDDB was studied, and the lifetime of the devices was analyzed and predicted.
采用恒定电压应力对90nmNMOS器件进行了TDDB击穿的评价实验，深入研究了90nm情况下TDDB的击穿机理，并对器件寿命进行预测和分析。 - The annealing characteristics under different conditions after 60 Co γ ray irradiation for rad hard 4007 NMOS transistor are explored, the irradiation sensitive parameters are investigated along with the radiation dose, annealing temperature and gate bias.
探讨了加固型CC4007经60Coγ射线辐照后NMOS晶体管的退火特性，研究了辐照敏感参数随辐照剂量、退火温度、退火时间和退火偏置的变化关系。 - RF nMOS transistors with optimized layouts are successfully fabricated in a 0.13 μ m CMOS RF/ MS technology.
采用0.13μMCMOS射频和混合信号工艺进行了射频nMOS场效应晶体管版图的优化设计和芯片制作。 - By using the theory of clipping voltage-switches, two kinds of master/ slave nMOS quaternary flip-flops are designed.
本文应用限幅电压开关理论设计了两种主从型nMOS四值触发器。 - A regular NMOS-only M-2M ladder and a current-to-voltage conversion circuit proposed in this paper are adopted in this design.
设计中，采用了一种规则的全NMOS管构成的M-2M梯形电路，以及本文提出的电流-电压转换电路。 - Experiment results show that no damage antenna scale dependent is found in Vt shift while corresponding plasma charging damage is detected in gate leakage current Ig, leak and sub-threshold characteristics at low drain electric field in nMOS devices of different antenna ratio ( AR).
试验结果表明在阈值Vt漂移中没有发现与天线尺寸相关的损伤，而在栅隧穿漏电流和低源漏电场下亚阈值特性中发现了不同天线比的nMOS器件有相应的等离子充电损伤。 - Based on simulation, the characteristics and mechanisms of failure on a deep sub-micron grounded-gate NMOS ( GGNMOS) are studied under TLP ( transmission line pulse) stress.
对TLP（传输线脉冲）应力下深亚微米GGNMOS器件的特性和失效机理进行了仿真研究。 - Aimed at reducing distortion due to the threshold voltage variations of an NMOS switch, the paper introduces the design of a body effect compensated switch applicable to low voltage switched capacitor circuits.
为了减少NMOS开关阈值电压变化引起的信号失真，设计了一种适用于低压开关电容电路的体效应补偿开关，并利用该电路实现了一阶非反相开关电容（SC）低通滤波器。 - A new adiabatic logic circuit adopting two-phase non-overlap power clocks-Clocked Transmission Gate Adiabatic Logic circuit was designed by using the bootstrap effect of NMOS transistors, so that it could charge or discharge output loads in a fully adiabatic manner.
本文利用NMOS管的自举效应设计了一种新的采用二相无交叠功率时钟的绝热逻辑电路&钟控传输门绝热逻辑电路，实现对输出负载全绝热方式充放电。 - Design and Applications of programmable Neural Network Chip with Floating Gate NMOS Transistors
一种基于浮栅NMOS晶体管的可编程神经网络芯片的设计和应用 - A new current mode CMOS four quadrant analog multiplier consisted of current conveyors and four NMOS transistors operating in triode region is presented.
本文提出了一种新型四象限CMOS模拟乘法器，其核心组成为工作于三极管区的NMOS晶体管和高频CCII（第二代电流传输器）电路。 - The pixel circuit includes only three NMOS transistors.
该结构像素电路非常简单，仅用三个NMOS管； - This paper discusses the design method of E/ D NMOS high stability voltage reference.
本文讨论E/DNMOS高稳定度基准电压源的设计方法。 - Two-dimensional section structure, profiling of impurity concentration and electrical characteristics of NMOS are gained.
以LDD结构的NMOS器件为例进行了二维工艺仿真，得到了NMOS器件的二维剖面结构、杂质浓度的等值分布描述以及相应的电学特性。 - The effects of trapped-oxide charge and interface traps on the threshold voltage shifts, and some methods to improve the radiation hardness of NMOS/ SIMOX are discussed.
对引起阈值电压漂移的两个因素（氧化层电荷和界面态电荷）和提高NMOS／SIMOX抗辐照性能的几点措施进行了讨论。 - As a result, the NMOS and PMOS with elevated source/ drain structure increase the saturation current by 36% and 41%, respectively.
采用抬高源漏结构的NMOS和PMOS，其饱和电流分别提高了36%和41%。 - Research on the Design of Low-Voltage Low-Power nMOS and ECL Circuits
低电压低功耗nMOS与ECL电路设计研究 - The numeric simulation of LDMOS and NMOS devices, as well as the experiment of inductors on bulk-Si substrate, demonstrate excellent performance of active devices and passive elements, which validates the feasibility of the compact integration technology for SOI RF IC.
经过对LDMOS、NMOS的工艺、器件的数值模拟和体硅衬底电感的初步实验，获得了良好的有源和无源器件特性，证明这一简洁的集成工艺方案是可行的。 - A linear regulator with 3A source and sink current capability is designed for the bus terminal. The regulator employs a NMOS pass transistor, which not only improves the system current capacity but also ensures the case of low output voltage.
设计了一种适用于总线终端的具有3Asource与sink电流能力的快速响应线性稳压器，采用NMOS调整管结构不仅提高了系统电流能力，也保证了低输出电压的情况。 - On the basis of the analysis, it proposed the input decoder algorithm and the circuit implementation. And the paper also designed current switch drivers for the nmos and pmos current source matrix.
在此基础上，提出了输入解码电路的算法以及实现电路，并分别针对NMOS和PMOS电流源矩阵设计了电流源开关驱动器。 - Based on this, several binary and ternary nMOS circuits and ECL circuits with parallel switches are designed at switch-level.
在此基础上，论文从开关级设计了采用并联开关技术的适合于低电压电源工作的二值和三值nMOS电路和ECL电路。