A novel p-channel selected n-channel divided bit-line NOR ( PNOR) flash memory, which features low programming current, low power, high access current, and slight bit-line disturbance, is proposed. 分裂位线结构和低编程电压使得该结构具有很好的抗位线串扰特性和可靠性。
However, developing C-HMOS called for the creation of ann-well CMOS process, That had not been done previously because CMOS technology grew naturally out of the older p-channel transistor. 然而,开发C-HMOS时有个制作n井CMOS的程序,因为CMOS技术是在早期p通道晶体管技术上自然产生的,所以该程序之前没有人做过。
Basing on Bardeen's transfer Hamiltonian formalism, the charge storage characteristics of p-channel Ge/ Si hetero-nanocrystal based MOSFET memory is simulated. 采用巴丁(Bardeen)传输哈密顿方法,数值计算了p沟道锗/硅异质纳米结构存储器的时间特性。
Row and line electrode driving circuit, including shifter, inverter and Block circuits have been designed using P-channel TFT and much simulation work has been done also. 设计行、列电极扫描驱动电路,并进行了仿真验证。
Simulation demonstrates that the maximum breakdown voltages of N-and P-channel LDMOS are higher than 320 V, and the isolation structure can withstand the voltage over 300 V, which ensure reliable operation of high-voltage amplification. 模拟结果显示,N沟道和P沟道LDMOS晶体管的最大击穿电压都超过了320V,高压隔离超过300V,从而可以确保其高压放大功能。
Hot-Carrier Effects in Deep Submicron N-and P-Channel SOI MOSFET's 深亚微米SOIMOSFET低压热载流子效应研究
We performed electrical measurement on the Field Effect Devices made with these nanotubes, which shows p-channel characteristics. 对制作的FET器件进行了电学测试,碳纳米管阵列表现为P型工作模式。