A GPU is a hardware coprocessor that accelerates computations for computer graphics applications. GPU是一种硬件协处理器,可加速计算机图形应用程序的计算。
To start to understand a GP-GPU compared to a multicore coprocessor approach, try downloading the two examples of a point spread function to sharpen the edges on an image ( threaded transform example) compared with the GPU transform example. 与多核协处理器方法相比,要理解GP-GPU,可以尝试下载两个锐化图像边缘的点扩散函数示例(线程变换示例),与GPU转换示例进行比较。
Because few native platforms are stack-based ( the Intel X87 floating-point coprocessor is one notable exception), most native platforms can't execute Java bytecodes directly. 因为基于堆栈的本地平台很少(IntelX87浮点数协处理器是一个明显的例外),所以大多数本地平台不能直接执行Java字节码。
It can properly satisfy the needs of practice of IC design, embed operating system as well as Logic Analyzer and Cipher Coprocessor. 可作为逻辑分析仪、密码协处理器使用,也可用于信息安全、IC设计、嵌入式操作系统等有关的研究、开发和实验。
Parallel and Reconfigurable ECC Application Specific Instruction-set Coprocessor 并行可配置ECC专用指令协处理器
IIT began as a fabless vendor of semiconductor products for the math coprocessor and graphics chipset markets. 印度理工大学的一开始是无晶圆厂的半导体产品供应商的数学协处理器和图形芯片组市场。
A Small-area Design of High Throughput AES Coprocessor 一种小面积的高吞吐率AES协处理器设计
JPEG Decoding Coprocessor Based on FSL Bus 基于FSL总线的JPEG解码协处理器
% 1 performed an invalid arithmetic operation.|% 1 attempted to use a nonexistent math coprocessor. %1执行了非法运算。%1试图使用并不存在的数学协处理器。
Design and Measure Coprocessor based on CORDIC Algorithm 基于CORDIC算法的数字协处理器设计与测试
Use this setting if clips play at wrong speed or sound scratchy or distorted. ( Requires a floating point coprocessor) 如果剪辑播放速度不正确或声音质量较差,请使用该设置(需要浮点协处理器)。
The FPGA was used as a coprocessor for image acquisition and pre-processing. FPGA作为协处理器完成图像的采集和预处理。
This implementation achieves relatively higher data throughput at little cost of circuit resources, and forms a reusable IP core of AES Crypto Coprocessor. 本设计使用了少量的资源达到了比较高的数据吞吐量,形成可重用的AES加密解密协处理器的IP核。
Research on Acceleration Mechanisms of Custom Instruction and Coprocessor 定制指令与协处理器加速机制的研究
Design of AES Coprocessor Used on the Node of Wireless Sensor Network 无线传感器网络节点中AES协处理器的设计
Design and Verification of Vector Floating Point Coprocessor VFP-A 向量浮点协处理器VFP-A的设计和验证
AES Coprocessor Implementation Based on Wireless Sensor Network 基于无线传感网络的AES协处理器设计
Design of system control coprocessor in 32-bit RISC processor 32位RISC处理器中系统控制协处理器的设计与实现
Architecture research and design of parallel and reconfigurable ECC coprocessor based on VLIW architecture 基于VLIW的并行可配置ECC协处理器结构研究与设计
High performance speech vocoder using SIMD coprocessor 使用SIMD协处理器的高性能声码器
GRCC: A General Reconfigurable Coprocessor GRCC:一种通用可重构协处理器
ASIC design of a high-speed reconfigurable RSA cryptography coprocessor 高速可配置RSA密码协处理器的ASIC设计
Some design ideas and methods about components and structure of reconfigurable cipher coprocessor are proposed in this paper. 文章提出了一些关于可重构密码协处理器的组成与结构的设计思想和方法。
The area and speed of cryptography coprocessor impede the application of public-key cryptography RSA for smart card. 密码协处理器的面积过大和速度较慢制约了公钥密码体制RSA在智能卡中的应用。
The multimedia coprocessor consists of several modules to accelerate the processing of multimedia data. 多媒体协处理器中包含了多个专用于多媒体处理的功能模块,可以加速多媒体处理的进行。
This paper presents a design scheme of a motion estimation coprocessor, which can match an image at real-time. 设计了一个运动估计协处理器,用来从硬件的角度解决图像匹配的实时性问题。
Finally, circuit design, physical design, simulation and validation of the encryption coprocessor chip are presented. 然后,讨论了加密协处理器芯片的电路设计和仿真、验证问题。
Within hardware security algorithm coprocessor, security smart card can provide encrypt, decrypt, signature and authentication functions. 安全智能卡中内置硬件安全算法协处理器,可以安全高效处理加密、解密、签名和认证等功能。
You can implement the coprocessor freely in SPARC where provides with the coprocessor instruction set. 可以在SPARC微处理器中自由实现协处理器,SPARC中也提供了支持协处理器的指令集。
The design and implementation of RSA coprocessor. RSA协处理器的设计与实现。