The software part of the cymometer was designed in assembler language. 对于频率计的软件部分,是用汇编语言设计而成的。
Research on High-Precision Cymometer System Based on All Phase FFT 基于全相位FFT的高精度频率计系统研究
Design of Equal Precision Cymometer by MCU and FPGA 基于单片机与FPGA的等精度频率计设计
Design on Digital Cymometer Based on EDA Technology 基于EDA技术的数字频率计的设计
Based on equal precision frequency principle, this design avoids traditional cymometer's defect that precision declines as the frequency measured declines. 根据等精度测频原理,本设计克服了基于传统测频原理的频率计的测量精度随被测信号频率的下降而降低的缺点。
In the digital circuit, the digital cymometer is the circuit of time sequence, it is mainly formed by trigger with memory function. 在模拟电路中,函数发生器属于时序电路,它主要由具有记忆功能的触发器构成。
A Research on High-speed Digital Cymometer/ Dynamometer based on NIOS ⅱ 基于NIOSⅡ的高速数字频率功率计研究
Design and Implement of Digital Cymometer Based on General Integrated Circuit 基于通用集成电路的数字频率计设计与实现
The design and realizing of high-accuracy digital cymometer in FPGA 高精度数字频率计的FPGA设计实现
The high-resolution frequency control is implemented by the feedback of the cymometer which is programmed in CPLD, Frequencies will be very stable. 在CPLD内部实现了频率计功能,通过对输出频率进行反馈,实现对输出波形的频率进行精细调节,使输出频率更稳定。
Digital cymometer design by using the theorem of high accuracy and constant error 高精度恒误差数字频率计设计
The design of a counter measuring synchronous period is introduced in this paper. And based on it, a high precision digital cymometer is designed. 本文介绍了一种同步测周期计数器的设计,并基于该计数器设计了一个高精度的数字频率计。
Auto-adjusting digital cymometer based on FPGA 基于FPGA自适应数字频率计的设计
The functions of the arbitrary signal generator and cymometer can be realized with this instrument. 该仪器可以实现任意波形发生器和频率计等多种常用电子仪器的功能。
This cymometer uses CPLD to realize the measuring count of frequency, period, pulse width and occupy-empty ratio. 该频率计利用CPLD来实现频率、周期、脉宽和占空比的测量计数。
It introduces a digital cymometer which has the functions of frequency measuring, pulse cycle measuring, pulse width measuring and pulse signal ratio measuring. 介绍了具有频率测量、脉冲周期测量、脉冲宽度测量以及脉冲信号占空比测量等功能的数字频率计。
Design of Digital Cymometer Based on VHDL 基于VHDL的数字频率计设计
Introduces the material application of the vhdl language in the design of the digital cymometer Explains the process of the electronic design automatization ( EDA) and the important function of EDA technology in the design of the modern digital system 介绍了VHDL语言在数字频率计设计中的具体应用,说明了实现电子电路设计的自动化(EDA)过程和EDA技术在现代数字系统设计中的重要地位和作用
The Execution of Equal-precision Cymometer Based on Single-Chip Controller 基于单片微机控制的等精度频率计设计制作
Design of intelligent high-speed cymometer 智能高速频率计设计
The writer has adopted the design idea of top graphic to design the core chip, a decimal counter and a frequency controlling signal generator. Particularly, the circuit of the digital cymometer is designed on a grand scale programmable logic device FPGA. 本文采用自顶向下的设计方法,对数字频率计的核心&十进制计数器和测频控制信号发生器进行设计,其特点是将数字频率计的电路集成在一块大规模可编程逻辑器件(FPGA)芯片上。
Designing and achieving of digital cymometer based on SCM 基于单片机的数字频率计设计与制作
This system hao fulfilled the design of digital cymometer of systematical frequency survey system by using the design of FPGA device. 本系统采用了FPGA器件设计实现频率测量系统中的数字频率计设计。
This paper introduces a kind of extensive programmable logic chip to be the design carrier, VHDL as design input method that could design and develop the digital cymometer by using modularization cell design system. 介绍了一种以大规模可编程逻辑芯片为设计载体,以硬件描述语言VHDL为设计输入,采用模块化单元构建系统,进行数字频率计设计与开发的新方法。
The dissertation discusses the design process of a 1 Hz~ 4 GHz frequency measuring range and high resolution cymometer. 论述了一种频率测量范围为1Hz~4GHz、高分辨率频率计的设计方法。
Design of high speed and equal precision cymometer through CPLD 利用CPLD设计高速等精度频率测量仪
This paper introduces a method of designing 8-bit decimal digital cymometer by graphic imputing in application of MAX+ PLUS ⅱ. The method is proved to be correct through simulation. 应用MAX+PLUSⅡ软件通过原理图输入法,设计八位十进制数字频率计的一种方法,并且通过时序仿真,验证设计的正确性。
The cymometer design has important theoretical significance and practical application value, which adopts VHDL language programming, with the FPGA for hardware design carrier and the integrated development tool based on the SOPC. 采用VHDL语言编程、以FPGA为硬件设计载体、基于SOPC集成开发工具的频率计的设计,具有重要的理论意义和实际应用价值。
This cymometer is designed by the complete synchronous digital frequency measurement method based on the programmable logic devices FPGA. 本频率计采用的是全同步数字测频法并在FPGA可编程逻辑器件上进行设计实现。
The reach paper mainly discusses the design process of multi-function cymometer that uses CPLD to count the frequency measurement and cymometer is also controled by signal chip computer. 本文主要论述了利用CPLD进行测频计数,单片机实施控制实现多功能频率计的设计过程。