full-adder
英 [fʊl ˈædə(r)]
美 [fʊl ˈædər]
n. 全加（法）器
双语例句
- Programmable and Integrable Hybrid Optoelectronic Liquid Crystal Encoded 32 bit Full-adder Module
可编程可集成光电混合液晶编码32比特加法器模块 - For the optimization of Wallace tree adding, the series formulas of full-adder and 4-2 Compressor realization are introduced to guidance the selection.
对于最优Wallace树型加法实现，提出了全加器和4-2compressor电路实现Wallace树加法所需的关键加法路径级数公式以指导实现选择； - By applying switch-signal theory, the interaction between MOS transmission switching transistor and current signal in current-mode circuits is analyzed, and the theory of transmission current-switches which is suitable to current-mode CMOS circuits is proposed. The circuits such as ternary full-adder, etc.
本文应用开关信号理论对电流型CMOS电路中MOS传输开关管与电流信号之间的相互作用进行了分析，并提出了适用于电流型CMOS电路的传输电流开关理论。 - Weighted Realizations of Switching Functions Based upon Four-bit Full-adder
基于四位全加器的开关函数加权实现 - The logic synthesis of multivalued symmetric function based on binary full-adder
多值对称函数基于二值全加器的电路实现 - In this paper, one-bit ternary full-adder and full-multiplier are designed by using ternary universal-logic-gate-UkS based upon modular algebra.
本文利用基于模代数的三值通用逻辑门&Uk，设计了一位三值全加法器和全乘法器电路。 - A full-adder optimization design method in DSP
DSP芯片中全加器电路的优化设计 - Based on the theory of transmission current-switch, and analyzes current signal operation of add and subtract. By using this method, the current-mode CMOS circuits of modulo-3 adder and 2-bit binary full-adder have been designed in this paper.
以传输电流开关理论为基础，分析了电流信号的相加与相减运算及其电路的实现方法，并利用该设计方法设计了模3加和2位二值全加器的电流型CMOS电路。 - A Low-voltage and Low-power Full-adder
低电压低功耗全加器的研究设计 - Furthermore, an 1-bit Full-Adder is evolved as an example. Then, a method of implementing an evolved circuit with Genetic Algorithm on the EHW platform based on Evolvable Motherboard is presented.
进而，以一位全加器为例，详细阐述了在基于演化母板的EHW平台上，利用遗传算法演化生成一个具体电路的方法及实现效果。 - By analyzing every part of △∑ D/ A converter, it is demonstrated that power consumption is mainly produced by the full-adder and register of digital part.
通过对各个部分的功耗分析表明，电路功耗主要由数字部分的全加器和寄存器产生。 - Many implementations of full-adder and register are contrasted and studied. The full-adder and register with the lowest power consumption are chosen.
通过对多种全加器和寄存器的实现方法进行了比较研究，选择了功耗最低的全加器和寄存器。