prescaler
英
美
网络 预分频器; 预定标器; 预除器; 预置分频器; 分频器
复数：prescalers
双语例句
- Design of 6 GHz RF CMOS Low-Power Dual-Modulus Prescaler in WSN RF Chips
WSN射频芯片中6GHzRFCMOS低功耗双模前置分频器的设计 - You can use Enable to lower the output frequency by connecting it to a prescaler.
通过连接前置比例器，使用使能来降低输出频率。 - A High Speed Divide-by-14/ 16 Dual-Modulus Phase Switching Prescaler
一种高速14/16双模相位开关预分频器 - In this paper, a wide range programmable divider based on dual-modulus prescaler is proposed.
设计了一种基于双模预分频的宽范围可编程分频器。 - Due to its excellent performance, the prescaler could be applied to many RF systems.
由于其具有良好的性能，该分频器可应用于许多射频系统中。 - Dual-modulus prescaler can work well on high speed with lower jitter and lower power dissipation.
除8/9双模预分频器实现了高速、低抖动、低功耗设计。 - The down scalers are comprised of dual modulus prescaler ( DMP) and programmable& pulse swallow divider, different methods of high frequency analog circuit and digital logical synthesis are adopted respectively.
采用了高速射频双模预分频器与数字逻辑综合生成的可编程吞脉冲分频器相结合的设计方法。 - The special Flip-Flop, combination logic gate and improved topology of Prescaler, enable the Prescaler to intensify the low power-high speed tradeoff.
其中，采用了特殊的D触发器和组合逻辑门结构，改进了预置数分频器结构，能够使分频器工作在低功耗、高速度之间有比较好的折衷。 - A Novel Dual Modulus Prescaler Based on New D Flip-Flop
基于新型D触发器的双模前置分频器 - A Design of a 2.4G Low-Power BiCMOS Prescaler
一种2.4G的低功耗BiCMOS预置数分频器 - In PLL design, dual-modulus prescaler is one of the bottlenecks in achieving a higher operation speed, and D flip-flop is the key factor limiting the speed of prescaler.
在锁相环设计中，双模前置分频器（dual-modulusprescaler）是一个速度瓶颈，而D触发器是限制其速度的主要因素。 - A Study on. a Very-High-Speed and Low-Power ECL Prescaler
超高速低功耗ECL予置分频器研究 - Design of Local-oscillator VCO and High-speed Dual-modulus Prescaler in RF Front-end of Wireless LAN
无线局域网射频前端VCO及高速双模预分频器设计 - In PLL frequency synthesizers, dual modulus prescaler is a bottleneck in achieving a higher operation speed.
在锁相环频率合成器中，双模前置分频器是一个速度瓶颈。 - A 16/ 17 dual-modulus prescaler with on improved logic structure increases the speed.
改进逻辑结构的双模16/17预分频器提高了电路工作速度。 - A Real Time Clock/ Counter with Programmable Prescaler of Microcontroller
备有可编程预定标器的单片机实时时钟/计数器 - A novel phase-switching dual-modulus prescaler is employed in the design to tackle the speed bottlenecks between high-speed VCO and digital counter.
该频率合成器采用新型的相位切换式双模预置分频器，很好地解决了高速频率合成器中高速VCO与低速数字计数器之间的速度瓶颈问题。 - A New Design Method of the Configurable Non-exponential Prescaler
可配置非幂方分频器的全新设计方法 - The frequency comparator counts the prescaler cycles within a certain reference time and compares the number with preset data to estimate the VCO frequency. The frequency comparison error is analyzed in detail.
其中，频率比较单元在一定的参考时间内对预分频器的输出信号周期进行计数，然后通过比较计数结果与预设值的大小来估计VCO输出频率。 - Based on this technique a programmable dual-modulus prescaler is designed, and can be applied to several different wireless communication standards.
并基于此设计了一个可变分频比双模前置分频器，可适用于多种无线通信标准。 - It summarized the structure classification, the working principle and the design guideline of the LC VCO and its prescaler.
总结归纳了LC压控振荡器及其预分频器的结构分类、工作原理，设计准则。 - According to requirment of project target, a multi-modulus divider constituted with a 7/ 8 prescaler and P, S counters, is designed with the two proposed divider.
根据项目指标要求，以上述两种分频器为基础，重点构建了由7/8预分频和P、S计数器组成的多模分频器结构。 - In this prescaler, no glitch generate at switching, due to the change of switching order. And nor gate is introduced in phase-switching-control circuit to avoid the generation of extra pulse completely.
本预分频器通过改变相位切换电路中的切换顺序，完全避免了切换产生的错误毛刺的产生；切换控制电路中采用或非门产生相位切换控制信号，有效防止了多余脉冲的产生。 - The 7/ 8 prescaler is composed of CML divider, phase-switching circuit, phase-switching-control circuit and TSPC divider.
本设计的7/8预分频电路中包括两级CML二分频电路、相位切换电路、切换控制电路和TSPC二分频电路。 - The synchronized 8/ 9 prescaler is adopted achieving the speed requirements without extra power consumption.
8/9预分频器采用了同步电路结构，在不增加功耗的前提下，达到了高速的要求。