The reorganizable configuration system design of FPGA FPGA芯片内部可重构配置系统设计
A kind of reorganizable architecture for programmable encryption chip has been proposed in this paper. 提出了一种适用于可编程加密芯片的可重组体系结构。
A Reorganizable Architecture Based on Registers Heap Connection 一种基于寄存器堆连接的可重组逻辑体系结构
The Reorganizable Architecture for Programmable Encryption Chip 适用于可编程加密芯片的可重组体系结构
Second, a quantitative analyzed method based on Petri net theory for the software reliability on reorganizable platform is put forward. 针对可重构平台下的软件可靠性提出了一种基于随机Petri网理论的量化分析方法。